Compound Semiconductor (CS) materials are a Key Enabling Technology at the heart of modern society. They are central to the development of, for example, the 5G network, new energy efficient lighting, smart phones, satellite communications systems, power electronics for the next generation of electric vehicles and new imaging techniques. Simply put, these technologies support our connected world, our health, our security and the environment. The next generation of these technologies can only be achieved with a step change in CS manufacturing and we aim to the UK at the centre of this CS manufacturing research. This is not only important activity in its own right but will also support systems researchers in all of these important fields. The step change will be achieved by applying the manufacturing disciplines and approaches of Silicon to Compound Semiconductors and by combining CS with Silicon. This includes developing integrated epitaxial growth and processing with critical yield and reliability analysis; establishing new standards for CS device production, with a guaranteed number of wafer starts per week for key statistical based process control and development via IT infrastructure; solving the scientific and manufacturing challenges in wafer size scale-up combining large scale, 150-200mm diameter growth and fabrication for GaAs based and GaN based materials and apply this to existing and developed advanced processes; introducing a multi-project wafer culture (as is the norm in the silicon world) to share costs and encourage the widespread use of larger wafers by academics and SMEs. Critical to this approach is the characterisation equipment, which can be used in-line (during the manufacturing process) and over the larger (up to 200mm diameter) CS wafers we will utilise. This proposal is for this characterisation equipment to add to the large investment already made by Cardiff University and partners in epitaxial growth and fabrication infrastructure and equipment. We also ask for apparatus to allow high quality insulating layers to be deposited, which will enable the multi-project wafer approach to produce world leading performance, for access by our UK based circuit and system designers.