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FREESCALE SEMICONDUCTEURS France SAS

Country: France

FREESCALE SEMICONDUCTEURS France SAS

8 Projects, page 1 of 2
  • Funder: French National Research Agency (ANR) Project Code: ANR-08-VPTT-0003
    Funder Contribution: 1,643,710 EUR
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  • Funder: French National Research Agency (ANR) Project Code: ANR-10-VPTT-0001
    Funder Contribution: 1,608,770 EUR

    In conventional vehicles more and more electrical components are embedded to meet the needs of comfort, consumption reduction and function optimizations. Moreover, in the case of electric vehicles (EV) and hybrid (HEV) traction functions are handled by electronic power converters. For the latter applications, the markets for hybrid vehicles in the various possible architectures are beginning to develop at a "serial" scale". Particularly in Europe, based on micro-hybrid or mild-hybrid architectures, generally with low voltage (<50V) ads for series production are increasing. This leads to an increase in the number of power components embedded in a vehicle and thus to greater occurrence of failures of these components. Simultaneously to reduce costs, the active area of these components is increasingly reduced, leading to a continuous increase of electro-thermo-mechanical applied stresses. Due to manufacturing processes and modern methods of maintenance, component failure generally leads to the module failure. All this leads to a very high requirement in terms of reliability, a requirement which must be achieved gradually as the electric power installed increase progressively under penalty of greatly hamper the necessary development goals of consumption reduction. To achieve this objective, it is first necessary to understand the failure modes and failure mechanisms of power modules following normal and abnormal use. But such a study must be considered at a system level of the power electronics (module + thermal environment and packaging + connections) taking into account the real application environment.

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  • Funder: French National Research Agency (ANR) Project Code: ANR-05-PDIT-0018
    Funder Contribution: 480,079 EUR
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  • Funder: French National Research Agency (ANR) Project Code: ANR-09-VPTT-0007
    Funder Contribution: 630,963 EUR
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  • Funder: French National Research Agency (ANR) Project Code: ANR-12-INSE-0005
    Funder Contribution: 944,001 EUR

    Electromagnetic (EM) fault-injection is the last most recent technique that is used to break a cryptosystem. It is reckoned as one of the most powerful attack because the induced currents are much higher than previously obtained with lasers. Moreover electromagnetic fields are able to influence encapsulated chips or to change memory contents while bypassing existing countermeasures. Although a high know-how exists within the consortium that has already demonstrated EM fault injections, a deeper understanding and efficiency optimisation is still lacking. A twofold output is expected from this study: first to make these attacks more aggressive, and second to protect future circuits. The present project aims at evaluating and quantifying the EM threats on secure ICs. Its objectives are encompassed by the following three main questions: • What can be observed, at best, in an integrated circuit (IC) by EM near field scan? • Why and how EM fault injection works? • What are the practical and theoretical limits of EM threats? Answering these questions implies to model the physical interaction of the probe with the IC to understand the resolution limit and injection efficiency. The influence of the layout and the propagation of the fault have also to be accurately modelled to predict the answer of the whole IC subject to a fault. On the physical side, model results will help to improve existing probes and design new ones that will be tested in the whole frequency range from 1 MHz up to 100 GHz (to our knowledge, all existing platforms operate in a frequency range from 1 MHz up to 4 GHz) with expected resolution of a few tens of microns. Concrete applications of side channel attack (SCA) and fault injection will be conducted to validate efficiency of our probes and quantify the EM threats on secure ICs. From these applications, new guidelines will be defined and evaluated to protect future circuits against EM SCA and fault injection. Either soft- and hard-ware countermeasures are planned.

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