The project aims to realize a strong methodology for the development and design of a radiation hard non-volatile memory technology by using standard CMOS silicon processing. Since standard silicon memories, such as flash memories tend to fail under irradiation, a new approach is envisaged: the development of a specific memory technology, so called resistive random-access memory (RRAM), which is able to sustain heavy ions and other charged particles. The switching effect of RRAM devices is caused by chemical Redox-reactions, therefore, radiation effects like total ionizing dose and single event effects don’t affect the switching mechanism. Semiconductor memories, among rad hard integrated circuit scenario, are one of the most critical topics for space applications. Actually both volatile and nonvolatile memories, excluding few exceptions, are integrated using standard processes and standard architectures. This means that the final device is typically at least Rad tolerant and not Rad Hard and failure during mission is avoided using Error Correcting Code techniques including redundancy at the board level. The basic goal of the project is to give a methodology for the development of a new rad-hard nonvolatile RRAM memory with high-performance features like good retention, re-programmability and cycling, and realize a prototype (1Mbit RRAM memory) in order to validate the approach.

There is a need for a paradigm shift in the treatment of drug-resistant epilepsy. Several routes have been explored to modulate or silence dysfunctional neural circuits, through genetic, electrical, magnetic or optical means. All have serious limitations due to the unphysiological mechanisms used to regulate neuronal activity. In IN-FET, we address this issue by manipulating the elementary building blocks of cell excitability: ions. IN-FET tackles the visionary idea of altering neuronal firing and synaptic transmission by direct ionic actuation at the microscopic scale, while monitoring cell responses by arrays of nanoscale transistors. We will develop and test, in vitro, the use of active polymers to trap or release electrochemically specific ions in the extracellular milieu surrounding neurons. These will be integrated with ion sensors and ultra-sensitive nanowire arrays, offering closed-loop regulation of cellular electrical activity. We will deliver for the first time a device that can physiologically modulate the neuronal membrane potential, the synaptic release probability, and glutamatergic NMDA receptors activation by altering potassium, calcium, and magnesium ionic concentrations in a controlled and spatially-confined manner. High-resolution simultaneous probing of cell activity will be performed by Si-nanowire vertical transistors, penetrating the membranes and detecting the cell electrical activity at unprecedented spatial and temporal resolutions. In conclusion, IN-FET's multidisciplinary consortium brings together state-of-the-art electrochemistry, 3-d nanofabrication, nanoelectronics, and numerical simulations, and combines neuronal biophysics to device modeling. IN-FET will thus establish the proof-of-principle for a breakthrough biocompatible neuromodulation technology, with a clear impact for future brain implants for epilepsy treatment, advancing neuroscience, biomedical microsystems engineering, and nano-neurotechnology.

R2POWER300 is committed to challenge the following Objectives: • Development and manufacturing of a multi-KET Pilot Line (i.e. Nanoelectronics, Nanotechnology, Advanced Manufacturing) • Energy Efficiency and CO2 Reduction megatrends. The project aims to achieve the following Goals: 1. Set the stage for the future extension to 300mm of the R2 Fab facility located in Agrate Brianza (Italy) - i.e. line’s specification, tools’ evaluation and screening, new process’s optimization and characterization, etc. 2. To evaluate, characterize and optimize the equipments and process necessary to achieve the new BCD10 technology, featuring 90nm lithography, at 300mm wafer size. BCD (i.e. Bipolar + CMOS + DMOS) is a unique smart power technology invented by ST in the mid ‘80s (CMOS’s gate length was 4 m at that time!). As of today BCD is one of the key technology assets of ST and the indefatigable evolution and challenging roadmap makes ST a world-class leader on smart power ICs. 3. Advanced System in Packages: some SiP activity will be performed, with specific reference to Sintering based die-attach, thermal analysis and dedicated packaging solution for high density ALD capacitors.

The objective of this project is to elaborate a new roadmap for Nanoelectronics, focused on the requirements of European semiconductor and applications industry, and the advanced concepts developed by Research centers in order to achieve an early identification of promising novel technologies, and cover the R&D needs all along the innovation chain. The final result will be a roadmap for European micro- and nano-electronics, covering all TRL, with a clear identification of short, medium and long term objectives. The roadmap will be divided into main technology sectors and include also cross-functional enabling domains. A proper dissemination of results will take place through the close relationship of the project with the leading European organizations in the field of micro- and nano-electronics, and sanity checks are foreseen during the project with the users’ world.

The increasing amount of data that has to be processed in today’s electronic devices requires a transition from the conventional compute centric paradigm to a more data centric paradigm. In order to bridge the existing gap between memory and logic units that is known as the classical von Neumann bottleneck the concept of physical separation between computing and memory unit has to be repealed. Neuro inspired architectures constitute a promising solution where both logic and memory functionality become synergized together in one synaptic unit. Our project BeFerroSynaptic addresses the specific challenges of the H2020-WP 2018-2020 by targeting for the development of electronic synaptic devices based on one of the most power-efficient memory technologies – the ferroelectric polarization switching. The ultimate goal of the BeFerroSynaptic project is to develop a ‘ferrosynaptic’ technology platform featuring back-end-of-line (BEOL) integrated Hf(Zr)O2-based ferroelectric field-effect transistors (FeFETs) and ferroelectric tunnelling junctions (FTJs) on top of an existing CMOS technology. Our attempt is to demonstrate the feasibility (TRL 4) of the ‘ferrosynaptic’ concept in an extremely energy-efficient neuromorphic computing architecture. To ensure a realistic endeavour, the ambitious challenges will be tackled by building the complementary FTJ and FeFET device development on existing technologies and adapt it to BEOL integration on top of a CMOS technology, and building on existing neuromorphic processor designs that will be adapted to the ‘ferrosynaptic’ technology. The BeFerroSynaptic consortium assembles a significant amount of resources and expertise. It includes representatives both from the academic and research community as well as from industry. The consortium is composed of 11 partners, of which 5 RTOs partners (CEA, NaMLab, NCSRD, IUNET, HZB), 4 universities (UZH, ETH, UG, TUD as project consultant) and 2 industrial partners (X-FAB, IBM).