The goal of the PRIME project is to establish an open Ultra Low Power (ULP) Technology Platform containing all necessary design and architecture blocks and components which could enable the European industry to increase and strengthen their competitive and leading eco-system and benefit from market opportunities created by the Internet of Things (IoT) revolution. Over 3 years the project will develop and demonstrate the key building blocks of IoT ULP systems driven by the applications in the medical, agricultural, domestics and security domains. This will include development of high performance, energy efficient and cost effective technology platform, flexible design ecosystem (including IP and design flow), changes in architectural and power management to reduced energy consumption, security blocks based on PUF and finally the System of Chip and System in Package memory banks and processing implementations for IoT sensor node systems. Developped advanced as 22nm FDSOI low power technologies with logic, analog, RF and embedded new memory components (STT RAM and RRAM) together with innovative design and system architecture solutions will be used to build macros and demonstrate functionality and power reduction advantage of the new IoT device components. The PRIME project will realize several demonstrators of IoT system building blocks to show the proposed low power wireless solutions, functionality and performance of delivered design and technology blocks. The consortium semiconductor ecosystem (IDMs, design houses, R&D, tools & wafer suppliers, foundries, system/product providers) covers complementarily all desired areas of expertise to achieve the project goals. The project will enable an increase in Europe’s innovation capability in the area of ULP Technology, design and applications, creation of a competitive European eco-system and help to identify market leadership opportunities in security, mobility, healthcare and smart cost competitive manufacturing.

Over the past 60+ years CMOS-based digital computing has giving rise to ever-greater computational performance, „big data“-based business models and the accelerating digital transformation of modern economies. However, the ever-growing amounts of data to be handled and the increasing complexity of today’s tasks for high performance computing (HPC) are becoming unmanageable as the data handling and energy consumption of HPCs, server farms and cloud services grow to unsustainable levels. New concepts and technologies are needed. One such HPC technology is Quantum computing (QC). QC utilizes so-called quantum bits (qubits) to perform complex calculations fundamentally much faster than a conventional digital-bit computers can. First quantum computer prototypes have been created. Superconducting Josephson junctions (SJJs) have been shown to be extremely promising qubit candidates to achieve a significant nonlinear increase of computational power with the number of qubits. For novel materials there is a great challenge yet opportunity in Europe to create a complete value chain for SSJs and QCs. Such a complete value chain will contribute to Europe’s technology sovereignty. The MATQu project aims at validating the technology options to produce SJJs on industrial 300 mm silicon-based process flows. It covers substrate technology, superconducting metals, resonators, through-wafer-via holes, 3D integration, and variability characterization. These will be assessed with respect to integration practices of qubits. Core substrate and process technologies with high quality factors, improved material deposition on large-substrates, and increased critical temperature for superconducting operation, will be developed and validated. The MATQu partners complement each other in an optimal way across the value chain to create a substantial competitive advantage, e.g. faster time-to-market and roll-out of technologies and materials for better Josephson junctions for quantum computing.