This project aims to realize transformative vertical gallium nitride-on-silicon (GaN-on-Si) transistors with breakdown voltage in excess of 1200 V. Power electronics is essential in applications including power distribution and transportation, with inefficiency of power electronic systems estimated to account for 20% of global carbon emissions. Furthermore, emerging low-carbon technologies, including electric vehicles and renewable energy generation, require power electronic devices with significant improvements over existing Si based solutions. GaN is a wide bandgap semiconductor alternative to Si, with superior power electronic material properties. Commercially-available lateral GaN transistors show good power performance, but are generally unsuitable for applications >1000 V due to high on resistance and large chip area. Vertical GaN transistors (where current flows into the plane of the chip, rather than along the surface) offer a step-increase in efficiency and power density over Si-based devices currently dominant in power electronics at voltages exceeding 1000 V. Large-scale commercialisation of vertical GaN devices is currently inhibited by the requirement for expensive and unsustainable GaN bulk substrates. Transfer to sustainable Si substrates as proposed here, with a cost reduction of >1000x, requires management of associated material defects, to be achieved in this work through of implementation of novel device structures and optimisation of material growth processes. Demonstration of vertical GaN on Si transistors with breakdown voltage of >1200 V (i.e. voltage at which device failure occurs), improved from <600 V in previous attempts, will enable exploitation of the outstanding GaN material properties in emerging mass market applications at >1000 V, unlocking new applications and enabling reduced carbon emissions in next-generation power electronic systems including electric vehicles and power distribution. Breakdown voltage in vertical GaN-on-Si transistors will be increased through improvement of material quality in the active device drift region. The novel structure will use an epitaxially-embedded n+GaN drain contact layer to facilitate a drain-recessed membrane device architecture, eliminating low-quality material from the active device region. In parallel, optimisation of epitaxial growth techniques will produce GaN-on-Si material with increased total thickness and a reduction in both dislocation density and background impurity levels. Drain-recessed GaN-on-Si membrane structures will then be integrated with finFET device topologies, shown to withstand operation voltages >1200 V in GaN-on-GaN, resulting in transistors with enhanced off-state blocking and on-state electron transport characteristics. The development workplan, in close collaboration and with strong support by industry, will enable both a thorough exploration of the underlying physics determining vertical breakdown in GaN-on-Si and improvements in device performance toward that required for large-scale commercialisation. Comprehensive failure analysis via reliability/stability testing and multiphysics modelling will provide further understanding of the GaN-on-Si material system and commercial potential. Technology demonstrators will be optimally positioned for integration with next-generation manufacturing chains and testing systems, ensuing maximum commercial impact. This will be achieved through regular consultation with the Project Steering Committee, consisting of UK-based manufacturers of power electronic materials, devices and systems, as well as academics and a prominent UK government policy influencer. The use of a Design Kit to promote the benefits of the technology to system designers and manufacturers will ensure maximum uptake and identification of additional application areas, toward achieving wide-scale use of GaN devices and an associated reduction in carbon emissions from inefficiency of power electronics.

Compound Semiconductor (CS) materials are a Key Enabling Technology at the heart of modern society. They are central to the development of, for example, the 5G network, new energy efficient lighting, smart phones, satellite communications systems, power electronics for the next generation of electric vehicles and new imaging techniques. Simply put, these technologies support our connected world, our health, our security and the environment. The next generation of these technologies can only be achieved with a step change in CS manufacturing and we aim to the UK at the centre of this CS manufacturing research. This is not only important activity in its own right but will also support systems researchers in all of these important fields. The step change will be achieved by applying the manufacturing disciplines and approaches of Silicon to Compound Semiconductors and by combining CS with Silicon. This includes developing integrated epitaxial growth and processing with critical yield and reliability analysis; establishing new standards for CS device production, with a guaranteed number of wafer starts per week for key statistical based process control and development via IT infrastructure; solving the scientific and manufacturing challenges in wafer size scale-up combining large scale, 150-200mm diameter growth and fabrication for GaAs based and GaN based materials and apply this to existing and developed advanced processes; introducing a multi-project wafer culture (as is the norm in the silicon world) to share costs and encourage the widespread use of larger wafers by academics and SMEs. Critical to this approach is the characterisation equipment, which can be used in-line (during the manufacturing process) and over the larger (up to 200mm diameter) CS wafers we will utilise. This proposal is for this characterisation equipment to add to the large investment already made by Cardiff University and partners in epitaxial growth and fabrication infrastructure and equipment. We also ask for apparatus to allow high quality insulating layers to be deposited, which will enable the multi-project wafer approach to produce world leading performance, for access by our UK based circuit and system designers.

This first grant project will develop an MBE-LEEM system, combining in-situ state-of-the-art Molecular Beam Epitaxy and a Low Energy Electron Microscope. The project will increase capabilities in sample exchange between institutions, enabling the analysis of nucleation on complex samples, increase reproducibility and accuracy of flux measurements, increase reproducibility and accuracy of temperature control, increase the number of material sources, enabling the growth of new materials, increase safety, reduce down-time of the system and increase control during surface preparation. The development of the MBE-LEEM will enable close collaboration between Cardiff University and EPSRC National Centre for III-V Technologies and with IQE, a world leading semiconductor wafer company. The system will be used for basic research, providing a wealth of data on nucleation dynamics and key epitaxial processes for theorists across UK, and providing industrial and academic partners with a unique characterization technique to determine optimum growth parameters in complex epitaxial processes by analysing growth dynamics. The extended capabilities of the MBE-LEEM will be tested by studying the nucleation of MnAs on InAs, determining the conditions for nucleation of Zinc-Blende MnAs. The nucleation of half-metallic MnAs on an InAs buffer layer with thickness below 2 monolayers was shown by Kim et al. in 2006, but the process has not been reproduced and no explanation on the mechanism leading to Zinc-Blende MnAs has been provided. MBE-LEEM will produce videos of the nucleation of MnAs on InAs with different thicknesses, highlighting the evolution of MnAs crystal structure and morphology during nucleation. The fabrication of half-metallic semiconductors can be key for the development of spintronics. Follow-up research is projected after this first grant development project in order to analyse magnetic properties of half-metallic MnAs, and to apply MBE-LEEM to other key research on epitaxial processes, such as the integration of GaAs on Silicon, or the nucleation of nanostructures.

The past few decades have witnessed an explosive growth in the semiconductor material and device technologies and their profound impact in the shaping of modern society. After experiencing the booming development of personal computer (PC) technology in the 1990s and the upsurge of the Internet in the 2000s, we are embracing a new age of the Internet of Things. As the explosive growth of Internet Protocol (IP) traffic is driving data centres to the so-called "Zettabyte Era", today's electrical interconnects quickly became the bottleneck due to ohmic loss and RC delays of copper wires. Optical interconnects promise to break the bottleneck by enabling data in computers moving both across chips and from chip to chip through photons. Photons are electromagnetic waves with very high frequencies. They can travel at the speed of light and they are super-efficient information carriers. The realisation of optical interconnects requires all optical components from passive to active devices to be integrated on the same silicon-on-insulator platform. Despite great success in developing silicon-based light modulation and detection, the lack of an efficient light emitter due to the indirect bandgap properties of silicon continues to pose a major roadblock. In contrast to silicon, most of III-V compound semiconductors have a direct bandgap with excellent photon absorption and emission efficiency. It is widely perceived that integrating III-V semiconductors, the best available materials for light emitters, on silicon could unpin the transition from electrical to optical interconnects. Epitaxial growth of III-V materials in the desired areas on silicon offers a scalable, low-cost and high-throughput scheme to bring optical capabilities to silicon integrated circuits. However, there are several fundamental challenges associated with material incompatibility, including a large mismatch in the lattice constants and thermal expansion coefficients, and the growth of polar materials on non-polar substrates. Conventional III-V/Si epitaxy circumvents these challenges through multiple buffer layers on bulk silicon wafers. However, thick buffers limit process throughput and present a big barrier for efficient light coupling to the underlying silicon waveguides. In this project, an advanced epitaxy process will be developed to enable an III-V on insulator (XOI) structure integrated on silicon wafers. By taking advantage of the crystallographic geography and selective area growth in confined spaces, we aim to achieve dislocation-free micro-sized thin films on insulators without requesting complex buffer designs. Such a buffer-less platform can potentially support intimate integration of III-V compound semiconductors with silicon waveguides and open enormous opportunities in Si photonics. As a proof-of-concept demonstration, micro-disk lasers will be fabricated to validate the optical quality of the III-V structures and highlight its potential for photonics integration.

Wide bandgap (WBG) semiconductors offer the potential to deliver electronic devices and systems with advanced power handling performance beyond that achievable in silicon. This stems from their intrinsic ability to operate at higher voltages, as attributed to their larger semiconductor bandgap. Although excellent progress has been made in the development of WBG technologies GaN and SiC, new and emerging materials with even larger bandgap (so called ultra-wide bandgap semiconductors) offer even greater potential performance gains. Maximising the high-power handling capability of such electronic components is essential to address many of the energy and environmental-related challenges that we currently face. For instance, advanced high-power solid-state systems will be required to enable smart power grids for future distribution of electricity and for efficient voltage conversion in electric vehicles. High power systems operating at high frequencies will also be required to meet the performance demands of future communication (e.g. beyond 6G mobile comms) and radar systems. AlGaN is an emerging ultra-wide bandgap (UWBG) material with the potential to deliver superior high-power handling at both low and millimetre wave frequencies than existing WBG semiconductor technologies, while crucially providing integration potential with the largely mature GaN material platform. In contrast to GaN, the introduction of aluminium to produce AlGaN increases the bandgap substantially, allowing for greatly increased breakdown field and even higher-voltage device operation for a higher Al composition. Doping of AlGaN, as required to convert the intrinsic material from an insulator into a semiconductor, is significantly more challenging than GaN however, particularly for higher Al compositions. Exploitation of polarisation-induced doping techniques similar to that used in GaN device technologies may however yield a route to realise the large potential of this material system for next generation high power electronic applications. In this work we will undertake a material investigation and evaluation study to assess and map crucial physical and electronic material properties for AlGaN epitaxial layers with 50% to 100% Al content (whereby the most benefit in terms of high-power device operation potential beyond GaN may be achieved), through a programme of material simulation, design, growth and characterisation. This initial material study will be coupled with and complemented by the development of Field Effect Transistor devices using the most promising of these material layers to demonstrate preliminary device performance potential. The outcomes of this study will be used to i) evaluate the potential of Al-rich AlGaN with a focus on high power RF device applications, ii) identify the technical challenges that need to be addressed to realise this potential for both high power and RF power applications iii) establish an ongoing research and exploitation strategy for UK and Irish academia and industry for Al-rich AlGaN-based technology.